TMS320LF2401

High-Performance Static CMOS Technology

25-ns Instruction Cycle Time (40 MHz)
40-MIPS Performance
Low-Power 3.3-V Design

Based on TMS320C2xx DSP CPU Core

Code-Compatible With 240x and F243/F241/C242
Instruction Set Compatible With F240

On-Chip Memory

Up to 8K Words x 16 Bits of Flash EEPROM (2 Sectors) (LF2401A)
8K Words x 16 Bits of ROM (LC2401A)
Programmable "Code-Security" Feature for the On-Chip Flash/ROM
Up to 1K Words x 16 Bits of Data/Program RAM

544 Words of Dual-Access RAM
Up to 512 Words of Single-Access RAM

Boot ROM

SCI Bootloader

Event-Manager (EV) Module (EVA), Which Includes:

Two 16-Bit General-Purpose Timers
Seven 16-Bit Pulse-Width Modulation (PWM) Channels Which Enable:

Three-Phase Inverter Control